1. Field of the Invention
This invention relates to electronic circuits used as comparators, and more specifically to electronic circuits used as comparators with built-in hysteresis.
2. Description of the Relevant Art
The problem addressed by this invention is encountered in electronic circuits used to compare a first voltage to a second voltage. Commercially available comparators, such as an LM2904 are readily available and are often used to compare voltages. The LM2904 is designed for low hysteresis and low offset. However, it may be desirable in some applications to have hysteresis, such as in a reset circuit. FIG. 1 shows a prior art comparator, such as the LM2904, configured to have hysteresis as is known in the prior art. More specifically, FIG. 1 shows comparator 10 having a non-inverting input 4, an inverting input 12, and an output 8. Resistor 6 and resistor 3 add hysteresis to circuit, as is known in the art. Typical resistor values for this configuration are 10 kilo-ohm for resistor 3 and 1 mega-ohm for resistor 6. In fact, a problem with this circuit is that large resistor values are required and/or the circuit has an undesirable low gain.
FIG. 2 shows a prior art comparator circuit 16. This circuit includes a bias circuit 18, a differential input stage 20, and a hysteresis circuit 22. The bias circuit includes current source 24 connected in series with NPN bipolar transistor 26 and resistor 28. In operation, current is generated by current source 24 to forward bias transistor 26. This creates a bias voltage which is used by the transistors in the differential input stage 20 and by transistor 48 of the comparator 16.
The differential stage includes PNP transistors 30, 36, 40 and 44, NPN transistors 32 and 46, resistors 38 and 42, and current source 34. In operation, the base of transistor 36 is the non-inverting input of comparator 16 and the base of transistor 40 is the inverting input. When the base of transistor 36 is at a higher voltage than the base of transistor 40, transistor 40 turns on and conducts the current supplied by current source 34 while transistor 36 is off. Consequently, the transistor 46 is turned off which allows transistor 44 to drive the voltage on V.sub.out high. Conversely, if the base of transistor 36 is lower than the base of transistor 40, then transistor 36 is on and transistor 40 is off. This condition drives the emitter of transistor 46 low which turns transistor 46 on. Since transistor 46 is on, V.sub.out is driven to a low voltage.
The hysteresis circuit 22 includes PNP transistor 48 and resistor 50. In operation, transistor 48 turns on when the V.sup.- input of the comparator is at a sufficiently low value to turn on transistors 40 and 48. With transistor 48 on, a voltage drop is developed across resistor 50. Therefore, the additional voltage drop is the hysteresis which must be overcome to switch the comparator when the voltage on the V.sup.- input rises.
The problem with the prior art circuit in FIG. 2 is that the circuit requires resistors 38 and 42 to be relatively low resistance so that the circuit can have sufficient dynamic range without the transistors in the differential stage operating in saturation. Consequently, the circuit in FIG. 2 suffers from low gain.
FIG. 3 shows a circuit which is very similar to FIG. 2 and differs only in how the hysteresis in the circuit is achieved. FIG. 3 shows a bias current circuit comprising transistor M18, Q29, and resistor R40. The differential input stage comprises transistors Q0, Q1, Q2, Q3, Q4, and Q5. The output stage comprises M15 and M19. M13, M14, M15, M16, and M51 are current sources for the circuit. The base of Q3 is the inverting input and the base of Q0 is the non-inverting input of the differential stage. Resistors R26, R29, and R36 form a voltage divider to set up the voltage reference for the inverting input and to form the hysteresis circuit.
In operation, the output of the circuit, opoff, switches when the input, drain, rises to the threshold voltage of the circuit. At that point, Q0 and Q1 turn off while transistors Q3 and Q2 turn on. With Q3 on, M36 and M19 are turned on thereby activating the hysteresis circuit and pulling the output to a low voltage, respectively. The hysteresis circuit is activated by transistor M36 effectively shorting resistor R30 which effectively changes the voltage reference on the inverting input. The problem with this circuit is that current is always flowing in through the voltage divider network. Additionally the resistor R36 reference voltage tends to vary.
FIG. 4 shows another prior art circuit for generating hysteresis in a comparator. In this example, resistor 50 and bipolar transistor 52 set up a bias voltage which is used by transistors 54 and 56 to generate bias currents for the differential pair. Transistors 64 and 70 form the differential pair of this comparator. The hysteresis for this circuit is generated by turning on or off transistor 56 with transistor 72 and by running the emitter current of transistor 70 through resistor 68. When the voltage at the base of transistor 64 is sufficiently higher than the voltage on the base of transistor 70, transistor 62, transistor 64 and transistor 66 are turned on and transistor 70 is turned off. Since transistor 70 is off and transistor 66 is on, the output voltage is high and transistor 72 is turned off. Therefore, transistor 56 is turned on and the current through the collector of transistor 64 is equal to the current flowing through transistors 54 and 56.
The comparator will switch states when the base voltage of transistor 70 is large enough to induce a current through transistor 70 which is equal to the current through transistor 64. Since the current requirement for the transition has now increased because transistor 56 is now on, whereas before it was turned off, the hysteresis is generated by the extra current through transistor 56 and the voltage drop across resistor 68. In other words, the hysteresis is generated by the tail currents of transistor 70.